The invention relates to radio frequency tuners, and more particularly to such tuners which employ a phase-locked-loop as a frequency generation element.
Phase-locked-loops are commonly used in circuits to produce a precise, stable frequency. They can be used both as an oscillator in a receiver to detect signals of a prescribed frequency and as a frequency synthesizer in a transmitter to generate an output signal having a selectively variable frequency. The basic elements of a phase-locked-loop (PLL) include a voltage controlled oscillator (VCO) for producing an output signal having a controlled frequency, a phase detector for comparing the phase of the output signal with that of a predetermined reference signal and for producing an error signal representing the detected phase difference, and a loop filter for filtering the error signal and coupling it to the VCO to controllably adjust the output signal's frequency.
In applications such as frequency hopping transmitters and receivers, the frequency of a PLL synthesizer must be changed quickly. For fast frequency changes, it is desirable that the PLL filter have a wide bandwidth. Once a new frequency is attained, however, it is desirable that the filter have a narrow bandwidth to remove noise which may cause frequency disturbances. The need for two separate bandwidths for the two operating modes has been commonly met by providing a switchable lag network following the loop filter. However, such switching introduces voltage transients which render the VCO output unstable for a length of time, and the output is thus not usable until the VCO frequency stabilizes. The transients usually result from an inability to maintain a constant DC voltage level on a capacitor in the lag network in both wideband and narrowband modes. The settling time is usually too long for use in a frequency hopping system.
It is therefore an object of the present invention to provide a means for changing bandwidth in a PLL synthesizer, or the like, which is suitable for use in frequency hopping receivers and transmitters.
It is another object of the present invention to provide means for changing bandwidth in a PLL synthesizer which minimizes frequency disturbances.
It is a further object of the present invention to provide means for changing bandwidth in a PLL synthesizer which is fast.
It is an additional object of the present invention to provide means for changing bandwidth in a PLL synthesizer which eliminates the need for extremely accurate components.